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33 ghz to 40 ghz, gaas, phemt, mmic, 1 w power amplifier with power detector data sheet HMC7229CHIPS rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2016 analog devices, inc. all rights reserved. technical support www.analog.com features 32 dbm p sat with 22 % pae p1db p out : 31.5 dbm high o ip3: 39.5 dbm high g ain: 24 .5 db 50 m atched i nput/ o utput applications point to p oint r adios point to multipoint radio vsat and satcom general description the HMC7229CHIPS is a four - stage , gallium arsenide ( gaas ) , pseudomorphic high el ectron mobility transfer ( phemt ) , monolithic microwave integrated circuit ( mmic ) , 1 w p ower a mplifier wit h an integrated temperature compensated on - chip p ower d etector, operating between 33 ghz and 40 g hz. the HMC7229CHIPS provides a typical range of 23 db to 24 .5 db of g ain and a range of 30 dbm to 32 dbm of saturated output power (p sat ) with 12 % to 22 % (typical) power a dded efficiency ( pa e ) range across a band of 33 ghz to 40 ghz from a 6 v supply. with an excellent o ip3 with a range of 37 dbm to 39.5 dbm across a band of 33 ghz to 40 ghz , t he HMC7229CHIPS is ideal for linear applications such as high capacity point to point or point to multipoint radios or very small aperture terminal ( vsat ) / satellite communications ( satcom ) applications demanding 32 dbm of efficient saturated output power. the radio frequency (rf) input/ outp ut ports are internally matched and dc blocked for eas y integration into higher level assemblies . functional block diagram HMC7229CHIPS v dd4 v dd3 v dd1 v dd2 v gg1 v dd8 v dd7 v dd5 v dd6 v gg2 v ref v det rfin rfout 2 1 8 9 3 4 5 6 7 14 13 12 1 1 10 14566-001 figure 1.
HMC7229CHIPS data sheet rev. 0 | page 2 of 16 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general descript ion ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specificatio ns ..................................................................................... 3 33 ghz to 35 ghz frequency range ......................................... 3 35 ghz to 37 ghz frequency range ......................................... 3 37 ghz to 40 ghz frequency range ......................................... 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 interface schematics ..................................................................... 7 typical performance characteristics ..............................................8 theory of operation ...................................................................... 12 applications information .............................................................. 13 mounting and bonding techniques for millimeter wave gaas mmics .............................................................................. 13 handling precautions ................................................................ 13 mounting ..................................................................................... 13 biasing procedures ..................................................................... 13 typical application circuit ....................................................... 14 assembly diagram ..................................................................... 15 outline dimensions ....................................................................... 16 ordering guide .......................................................................... 16 revision history 6/2016 revision 0 : initial version
data sheet HMC7229CHIPS rev. 0 | page 3 of 16 specifications 33 gh z to 3 5 gh z frequency range t a = 25c, v d d = v dd1 = v dd2 = v dd3 = v dd4 = v dd5 = v dd6 = v dd7 = v dd8 = 6 v, i d q = 1200 ma . 1 , 2 table 1 . parameter symbol test conditions/comments min typ max unit frequency range 3 3 3 5 ghz gain 21 23 db gain variation over temperature 0.035 db/c return loss input 7 db output 15 db output output power for 1 db compression p1db 29.5 31.5 dbm saturated output power p sat 32 dbm p ower added e fficiency pae pae taken at s aturated o utput p ower 22 % output third - order intercept o ip3 measurement taken at p out /tone = 20 dbm 39.5 dbm supply current i d q 3 800 1200 ma supply volt a ge v dd 5 6 v 1 recommended bias c ondition s . 2 adjust the v ggx supply voltage between ?2 v and 0 v to achieve i dq = 1200 ma . 3 i dq is the drain current without applying rf power. 3 5 gh z to 37 gh z frequency range t a = 25c, v dd = v dd1 = v dd2 = v dd3 = v dd4 = v dd5 = v dd6 = v dd7 = v dd8 = 6 v, i d q = 1200 ma. 1 , 2 table 2 . parameter symbol test conditions/comments min typ max unit frequency range 3 5 37 ghz gain 22.5 24.5 db gain variation over temperature 0.044 db/c return loss input 9.5 db output 20 db output output power for 1 db compression p1db 28.5 30.5 dbm saturated output power p sat 31 dbm power added efficiency pae pae taken at saturated output power 16 % output third - order intercept o ip3 measurement taken at p out /tone = 20 dbm 39 dbm supply current i d q 3 800 1200 ma supply voltage v dd 5 6 v 1 recommended bias condition s . 2 adjust the v ggx supply voltage between ?2 v and 0 v to achieve i dq = 1200 ma . 3 i dq is the drain current without applying rf power.
HMC7229CHIPS data sheet rev. 0 | page 4 of 16 37 gh z to 40 gh z frequency range t a = 25c, v dd = v dd1 = v dd2 = v dd3 = v dd4 = v dd5 = v dd6 = v dd7 = v dd8 = 6 v, i d q = 1200 ma. 1 , 2 table 3 . parameter symbol test conditions/comments min typ max unit frequency range 37 40 ghz gain 21.5 23.5 db gain variation over temperature 0.045 db/c return loss input 9.5 db output 13 db output output power for 1 db compression p1db 27.5 29.5 dbm saturated output power p sat 30 dbm power added efficiency pae pae taken at saturated output power 12 % output third - order intercept o ip3 measurement taken at p out /tone = 20 dbm 37 dbm supply current i d q 3 800 1200 ma supply volt a ge v dd 5 6 v 1 recommended bias condition s . 2 adjust the v ggx supply voltage between ?2 v and 0 v to achieve i dq = 1200 ma . 3 i dq is the drain current without applying rf power.
data sheet HMC7229CHIPS rev. 0 | page 5 of 16 absolute maximum rat ings table 4 . parameter rating drain bias voltage ( v dd ) 7 v rf input powe r (rfin) 21 dbm channel temperature 175 c continuou s power dissipation (p diss ), t a = 85c (derate 10 7 mw/c above 85c) 9.7 w thermal resistance, jc (channel to bottom die) 9.3c/w storage temperature range ?65 c to +150 c operating temperature range ?55 c to + 85 c esd sensitivity, human body model (hbm) class 0, passed 150 v stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution
HMC7229CHIPS data sheet rev. 0 | page 6 of 16 pin configuration and fu nction descriptions v dd4 v dd3 v dd1 v dd2 v gg1 v dd8 v dd7 v dd5 v dd6 v gg2 v ref HMC7229CHIPS v det rfin rfout 2 1 8 9 3 4 5 6 7 14 13 12 1 1 10 14566-002 figure 2. pad configuration table 5 . p ad function descriptions p ad no. mnemonic description 1 rfin rf input. this pad is ac - coupled and matched to 50 . 2 , 14 v gg1 , v gg 2 gate c ontrol s fo r the p o wer amplifier . a djust the v gg1 or v gg2 sup ply voltage to achieve recommended bias current. external 100 pf, 10 nf, and 4.7 f bypass cap acitors are required. 3 to 6, 10 to 13 v dd1 to v dd 8 drain b ias v oltage s . external 100 pf, 10 nf , and 4.7 f bypass cap acitors are requir ed. 7 v ref dc v oltage of the d i o de . this p a d is b ias ed through an external detector circuit used for temperature compensation of v det (s ee figure 36) . 8 rfout rf output. this pin is ac - coupled and matched to 50 . 9 v det dc v oltage r epresenting the rf o utput p ower . this pad is rectified by the diode that is biased through an external resistor (s ee figure 36) . die b ottom gnd die b ottom . the die bottom must be connected to rf/ dc ground . see figur e 9 for the interface schematic.
data sheet HMC7229CHIPS rev. 0 | page 7 of 16 interface schematics rfin 14566-003 figure 3 . rfin interface schematic 14566-004 v gg1 , v gg2 figure 4. v gg1 , v gg2 interface schematic 14566-005 v dd1 t o v dd8 figure 5. v dd1 to v dd8 interface schematic 14566-006 v ref figu re 6. v ref interf ace schematic rfout 14566-007 figure 7. rfout interface schematic 14566-008 v det figure 8. v det interface schematic 14566-009 gnd figur e 9. gnd interface schematic
HMC7229CHIPS data sheet rev. 0 | page 8 of 16 typical performance characteristics ?40 ?30 ?20 ?10 0 10 20 30 32 33 34 35 36 37 38 39 40 41 response (db) frequency (ghz) s21 s11 s22 14566 -010 figure 10 . response gain and return loss vs. frequency ? 2 0 ? 1 5 ? 1 0 ?5 0 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 input re tu r n l o ss ( d b ) fr e q u e n c y ( g h z ) 14566 -0 1 1 + 2 5 c + 8 5 c ? 5 5 c figure 11 . input return loss vs. frequency at various temperature s 24 26 28 30 32 34 33 34 35 36 37 38 39 40 p1db (dbm) frequency (ghz) +2 5 c +8 5 c ?5 5 c 14566 -012 figure 12 . p1db vs. frequency at various temperatures 18 20 22 24 26 28 30 33 34 35 36 37 38 39 40 gain (db) frequency (ghz) + 2 5 c + 8 5 c ? 5 5 c 14566 -013 figure 13 . gain vs. frequency at various temperatures ?30 ?25 ?20 ?15 ?10 ?5 0 33 34 35 36 37 38 39 40 output return loss (db) +2 5 c +8 5 c ?5 5 c frequency (ghz) 14566 -014 figure 14 . output return loss vs. frequency at various temperatures 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 fr e q u en c y ( g hz ) 24 26 28 30 32 34 p1db (dbm) 5 .0v 5 . 5 v 6 .0v 14566 -015 figure 15 . p1db vs. frequency at various supply voltages
data sheet HMC7229CHIPS rev. 0 | page 9 of 16 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 fr e q u e n c y ( g h z ) 24 26 28 30 32 34 p sat (dbm) 14566 -016 + 2 5 c + 8 5 c ? 5 5 c figure 16 . p sat vs. frequency at various temperatures 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 fr e q u e n c y ( g h z ) 24 26 28 30 32 34 p1db (dbm) 14566 -017 1000ma 1200ma 800ma figure 17 . p 1db vs. frequency at various supply currents 1045 1100 1155 1210 1265 1320 1375 1430 0 5 10 15 20 25 30 35 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 12 i dd (ma) p out (dbm), gain (db), pae (%) input power (dbm) p out g a i n p ae i dd 14566 -018 figure 18 . power compression at 34 ghz (i dd is drain current with rf power applied) 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 fr e q u e n c y ( g h z ) 24 26 28 30 32 34 p sat (dbm) 14566-019 5 .0v 5 . 5 v 6 .0v figure 19 . p sat vs. frequency at various supply voltages 3 3 3 4 3 5 3 6 3 7 3 8 3 9 4 0 fr e q u en c y ( g hz ) 24 26 28 30 32 34 p sat (dbm) 14566-020 1000ma 1200ma 800ma figure 20 . p sat vs. frequency at various supply currents 1145 1200 1255 1310 1365 1420 1475 1530 0 5 10 15 20 25 30 35 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 12 i dd (ma) p out (dbm), gain (db), pae (%) input power (dbm) p out g a i n p ae i dd 14566-021 figure 21 . power compression at 39 ghz
HMC7229CHIPS data sheet rev. 0 | page 10 of 16 30 32 34 36 38 40 42 44 33 34 35 36 37 38 39 40 oip3 (dbm) frequency (ghz) + 2 5 c + 8 5 c ? 5 5 c 14566-022 figure 22 . output ip3 vs. frequency at various temperatures 30 32 34 36 38 40 42 44 33 34 35 36 37 38 39 40 oip3 (dbm) frequency (ghz) 14566-023 1000ma 1200ma 800ma figure 23 . output ip3 vs. frequency at various supply current 20 25 30 35 40 45 50 55 60 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 14566-024 3 3 g h z 3 4 g h z 3 6 g h z 3 8 g h z 3 9 g h z 4 0 g h z figure 24 . third - order intermodulation ( im 3) vs. p out /tone for various frequencies at v dd = 6 v 30 32 34 36 38 40 42 44 33 34 35 36 37 38 39 40 oip3 (dbm) frequency (ghz) 14566-025 5 .0v 5 . 5 v 6 .0v figure 25 . output ip3 vs. frequency at various supply voltages 20 25 30 35 40 45 50 55 60 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 3 3 gh z 3 4 gh z 3 6 gh z 3 8 gh z 3 9 gh z 4 0 gh z 14566-026 figure 26 . im 3 vs. p out /tone for various frequencies at v dd = 5.5 v 20 25 30 35 40 45 50 55 60 10 12 14 16 18 20 22 24 im3 (dbc) p out /tone (dbm) 3 3 gh z 3 4 gh z 3 6 gh z 3 8 gh z 3 9 gh z 4 0 gh z 14566-027 figure 27 . im 3 vs. p out /tone for various frequencies at v dd = 5 v
data sheet HMC7229CHIPS rev. 0 | page 11 of 16 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 33 34 35 36 37 38 39 40 reverse isolation (db) frequency (ghz) +2 5 c +8 5 c ?5 5 c 14566-028 figure 28 . reverse isolation vs. frequency for various temp e ratures 20 23 26 29 32 35 5.0 5.2 5.4 5.6 5.8 6.0 gain (db), p1db (dbm), p sat (dbm) v dd (v) gain p1db p sat 14566-029 figure 29 . gain, p1db, and p sat vs supply voltage (v dd ) at 36 ghz gain (db), p1db (dbm), p sat (dbm) 20 23 26 29 32 35 800 900 1000 1100 1200 i dq (ma) gain p1db p sat 14566-030 figure 30 . gain, p1db, and p sat vs. supply current (i dq ) at 36 ghz 4.0 4.5 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 12 14 power dissipation (w) input power (dbm) 3 3 g h z 3 4 g h z 3 6 g h z 3 7g h z 3 9 g h z 4 0 g h z 14566-031 figure 31 . power dissipation vs. input power for various frequencies at t a = 85 c 0.1m 1m 10m 100m 1 10 ?20 ?10 0 10 20 30 v det (v) output power (dbm) + 2 5 c + 8 5 c ? 5 5 c 14566-032 figure 32 . detector voltage (v det ) vs. output power at 38.5 ghz at various temperatures 0 5 1 0 1 5 2 0 2 5 p ae ( %) 33 34 35 36 37 38 39 40 frequency (ghz) 14566-033 figure 33 . pae at p sat vs frequency
HMC7229CHIPS data sheet rev. 0 | page 12 of 16 theory of operation the HMC7229CHIPS is a g aas , phemt , mm ic, 1 w power amplifier consisting of four gain stages in series. figure 34 shows a simplified functional block diagram of the HMC7229CHIPS . the input signal of the HMC7229CHIPS is evenl y divided into two paths and each path is amplified through the four independent gain st ages. t he amplified signals are the n combined at the rf o utput . the HMC7229CHIPS has single - ended input and output ports with impedances nominally matched to 50 ? internally over the frequency range from 33 ghz to 40 ghz. consequently, the HMC7229CHIPS can be directly inserted into a 50 ? system with no impedance matching circuitry required. impedences n ominally matched to a 50 ? s ystem also means that multiple HMC7229CHIPS amplifiers can be cascaded back to back without external matching circui tr y. similarly, multiple HMC7229CHIPS can be used with pow er dividers at the rf input and power combiners at the rf output to obtain higher output power levels. the input and output impedances are sufficiently stable compared to the variations in temperature and supply voltage that no impedance matching compensation is required. it is critical to supply very low inductance ground connections to the backside of the HMC7229CHIPS , ensuring stable operation. g uidance on mounting the HMC7229CHIPS is given in the mounting and bonding techniques for millimeter w ave g a a s mmic s section. t o achieve the best performance from the HMC7229CHIPS and not to damage the device , do not exceed the absolute maximum ratings. 14566-034 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v gg1 or v gg2 v dd1 v dd5 v dd2 v dd6 v dd3 v dd7 v dd4 v dd8 rfout rfin figure 34 . simplified functional block d iagram
data sheet HMC7229CHIPS rev. 0 | page 13 of 16 appl ications information mounting and bonding techniques for millimeter w ave g a a s mmic s attach the HMC7229CHIPS directly to the ground plane eutectically or with a conduc tive epoxy. to route the rf signal to and from the HMC7229CHIPS , use a 50 ? microstrip trans mission line on 0.127 mm ( 0.005 inches ) thick alum ina , thin film substrates (see figure 35 ). rf ground plane 0.102mm (0.004") thick gaas mmic ribbon bond 0.127mm (0.005") thick alumina, thin film substrate 0.076mm (0.003") 14566-035 figure 35 . routing rf signals to minimize the bond wire length, p lace microstrip substrates as close to the HMC7229CHIPS as possible. typical chip to substrate spacing is 0.076 mm to 0.152 mm ( 0.003 inches and 0.006 inches ) . handling precautions to avoid permanent damage to the device , adhere to the following precautions: ? all bare HMC7229CHIPS ship in either waffle or gel - based esd protective containers, sealed in an esd protective bag. after opening the sealed esd protective bag, store all chips in a dry nitrogen environment. ? handle the HMC7229CHIPS in a clean environment. never use liquid cleaning systems to clean the chip. ? follow esd precautions to protect ag ainst esd strikes. ? while applying bias, suppress instrument and bias supply transients. to minimize inductive pickup, use shielded signal and bias cables. ? handle the HMC7229CHIPS along the edges with a vacuum collet or a sharp pair of bent tweezers. the surface of the chip has fragile air bridges and must not be touched with a vacuum collet, tweezers, or fingers . mounting the HMC7229CHIPS is back metallized and can be die mounted on to a system with au/sn eutectic preforms or with electrically conductive epoxy. the mounting surface must be clean and flat. eutectic die attach it is best to use an 80% au /20% sn preform with a work surface temperature of 255c and a tool temperature of 265c . when the w ork surface is 255c and tool temperature is 265c , 90% nitrogen/ 10% hydrogen gas is applied to the work surface , maintain the tool tip temperature at 290c. do not expose the hmc7229chip s to a temperature greater than 320c for more than 20 sec. no more than 3 sec of scrubbing is required for attachment. epoxy die attach the abletherm 2600bt is recommended for chip attachment. apply a minimum amount of epoxy to the mounting surface so a thin epoxy fillet is observed around the perimeter of the HMC7229CHIPS after placing the device into position on the surface . cure the epoxy per the schedule provided by the manufacturer. wire bonding rf bonds made with 0.003 in. 0.0005 in. au ribbon ar e recom - mended for the rf ports. these bonds must be thermosonically bonded with a force of 40 g to 60 g . dc bonds of 1 mil (0.025 mm) diameter, thermosonically bonded, are recommended. create ball bonds with a force of 40 g to 50 g and wedge bonds with a force of 18 g to 22 g . create all bonds with a nominal stage temperature of 150c. apply a minimum amount of ultrasonic energy to achiev e reliable bonds. ke ep all bonds as short as possible, less than 12 mil (0.31 mm). biasing procedures the basic connections for operating the HMC7229CHIPS are shown in the typical application circuit section and the theory of operation section . the rf input and rf output are ac - coupled by internal dc block capacitors. follow the r ecommended bias sequencing to avoid damaging the amplifier. the a mplifier gate bias can be supp lied using either the v gg1 pin or v gg2 pin . use the v dd1 to v dd8 pins while applying the drain bias to the amplifier. te st i ng to gather data for the HMC7229CHIPS data sheet used the v gg1 pin with the v dd1 to v dd8 pins connected together . use t he following r ecommended b ias s equence during power - u p : 1. connect gnd to rf/dc ground . 2. set v gg1 or v gg2 to ? 2 v . 3. set v dd1 to v dd8 to 6 v . 4. increase v gg1 or v gg2 to achieve a typical i dq = 1200 ma . 5. apply an rf signal the dev ice . use the following recommended bias sequence during power - down: 1. turn of f the rf signal 2. decrease v gg1 or v gg2 to ? 2 v to achieve i dq = 0 ma . 3. decrease v dd1 , v dd2 , v dd3 , and v dd4 to 0 v . 4. increase v gg1 or v gg2 to 0 v .
HMC7229CHIPS data sheet rev. 0 | page 14 of 16 the b ias condition s listed at v dd = 6 v, i d q = 1200 is a r ecommended operating point to receive optimum performance from the HMC7229CHIPS . t he data used in this data sheet is taken with the recommended bias condition s (see the specifications section ). using the HMC7229CHIPS in a different bias condition may provide differe nt performance than the performance shown in the typical performance characteristics section . the v det and v ref pins are the output pins for the internal power dete ctor. the v det pin is the dc voltage output pin representing the rf output power rectified by the internal diode, biased through an external resistor. the v ref pin is the dc voltage output pin representing the referen ce diode voltage, which is biased throu gh an external resistor. t he reference diode voltage compensate s the temperature variation effects on both the v ref and v det diode s. figure 36 shows a suggested circuit to read out the output voltage in correlation with the rf output power . typical application circuit suggested circuit ?5v +5v +5v v ref v out = v ref ? v det v det 0.1f 0.1f 0.1f 100pf 100pf 100pf 100pf 100pf 10k? 10k? 100k? 10k? 10k? 100k? 4.7f + 4.7f + 4.7f + 4.7f + 4.7f + 4.7f + 0.1f 100pf 100pf 100pf 100pf 100pf 0.1f 0.1f v dd7 , v dd8 rfout rfin HMC7229CHIPS 1 2 14 3 13 4 12 5 1 1 6 10 7 9 8 v dd5 , v dd6 v dd1 , v dd2 v dd3 , v dd4 option 2 v gg2 option 1 v gg1 14566-036 figure 36 . typical application circuit
data sheet HMC7229CHIPS rev. 0 | page 15 of 16 assembly diagram 14566-037 figure 37 . assembly d iagram
HMC7229CHIPS data sheet rev. 0 | page 16 of 16 outline dimensions 07-29-2016- a 0.0178 0.102 0.0102 0.0813 2.380 0.890 0.130 0.130 2.794 0.102 side view 1 8 2 3 4 5 1 1 12 13 14 6 10 7 9 0.150 0.150 0.150 0.150 0.150 0.201 0.201 0.201 0.201 0.201 0.391 0.391 0.350 0.150 0.150 0.216 0.135 0.851 0.350 0.350 figure 38 . 14 - pad bare die [chip] (c - 14 - 4) dimensions shown in millimeters ordering guide model temperature range package description package option hmc7229 ? 55 c to + 85c 14- pad bare die [chip] c -14-4 hmc7229 sx ?55c to +85c 14- pad bare die [chip] c -14-4 ? 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d14566 - 0 - 6/16(0)

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